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| Ordering number : EN*4030A CMOS LSI LC89080, 89080Q Video Signal 3-Channel 8-Bit D/A Converter Preliminary Overview The LC89080 and LC89080Q are high-speed currentoutput D/A converters. They feature 8-bit resolution, provide 3 channels on a single chip, and can be used in demodulators for high-speed signals such as video signals. Package Dimensions unit: mm 3025B-DIP42S [LC89080] Features * Resolution: 8 bits * D/A converters: Three current-output D/A converter channels on a single chip * Maximum conversion speed: 30 MSPS * Error: 1.0 LSB (maximum) * Power supply: +5 V single-voltage power supply * Power dissipation: 330 mW * Inputs: TTL compatible SANYO: DIP42S unit: mm 3052A-QFP48A [LC89080Q] SANYO: QFP48A SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN D3095HA (OT)/5272TS No. 4030-1/8 LC89080, 89080Q Specifications Absolute Maximum Ratings at Ta = 25C, VSS = 0 V Parameter Maximum supply voltage Input voltage Operating temperature Storage temperature Symbol VDD max VIN Topr Tstg Conditions Ratings -0.3 to +7.0 -0.3 to VDD + 0.3 -30 to +75 -40 to +125 Unit V V C C Allowable Operating Ranges Parameter Supply voltage Reference voltage input Output resistance Input high-level voltage Input low-level voltage Phase compensation capacitance Symbol VDD VREFIN RO VIH VIL Ccomp 2.2 -0.3 1 Conditions min 4.5 typ 5.0 1.0 75 VDD + 0.3 +0.8 max 5.5 2.0 Unit V V V V F Electrical Characteristics at Ta = 25C, VDD = 5.0 V, VREFIN = 1.0 V, RREF = 300 , RO = 75 Parameter Resolution Maximum conversion speed Power dissipation Zero-scale output voltage Full-scale output voltage Full-scale voltage ratio Linearity error Differential linearity error Reference voltage output Symbol RES Fs max Pd Vzero Vfull FSR I.L. D.L. VREFOUT DC precision DC precision 0.99 1.00 Fs = 30 MSPS For each channel For each channel -15 0.92 0 30 330 0 1.00 4 400 +15 1.08 8 1.0 0.5 1.01 Conditions min typ max 8 Unit Bits MSPS mW mV V % LSB LSB V No. 4030-2/8 LC89080, 89080Q Pin Assignment LC89080 (DIP42S) Pin No. 1 2 3 to 8 9 10 11 to 16 17 18 19 to 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 Symbol DVDD DA1 DA2 to DA7 DA8 DB1 DB2 to DB7 DB8 DC1 DC2 to DC7 DC8 CLK DVDD DGND ICOB ICO AVDD IBOB IBO AGND IAOB IAO AVDD COMP IREF VREFIN VREFOUT DGND Digital system power supply (+5 V) Channel A digital input (MSB) Channel A digital input Channel A digital input (LSB) Channel B digital input (MSB) Channel B digital input Channel B digital input (LSB) Channel C digital input (MSB) Channel C digital input Channel C digital input (LSB) Clock input Digital system power supply (+5 V) Digital system ground (0 V) Channel C negative output. Connect to A.GND through an output resistor RO (usually 75 ). Channel C positive output. Connect to A.GND through an output resistor RO (usually 75 ). Analog system power supply (+5 V) Channel B negative output. Connect to A.GND through an output resistor RO (usually 75 ). Channel B positive output. Connect to A.GND through an output resistor RO (usually 75 ). Analog system ground (0 V) Channel A negative output. Connect to A.GND through an output resistor RO (usually 75 ). Channel A positive output. Connect to A.GND through an output resistor RO (usually 75 ). Analog system power supply (+5 V) Phase compensation capacitor. Connect a 1 F capacitor between this pin and ground. Reference current output. Connect a resistor that is 4 times the output resistance RO to this pin. Reference voltage input. This input pin sets the analog output dynamic range. Reference voltage output. The output voltage is set to 0.2 times VDD by a resistor divider. When VDD is 5.0 V, a 1.0 V reference voltage can be acquired from pin 40. Digital system ground (0 V) Description No. 4030-3/8 LC89080, 89080Q Pin Assignment LC89080Q (QFP48A) Pin No. 1 to 3 4 5 6 7 to 12 13 14 15 to 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 to 48 Symbol DA5 to 7 DA8 DB1 NC DB2 to DB7 DB8 DC1 DC2 to DC5 DVDD DC6 DC7 DC8 CLK NC DVDD DGND ICOB ICO AVDD AVDD IBOB IBO AGND IAOB IAO AVDD COMP NC IREF VREFIN VREFOUT DGND DVDD DVDD DA1 DA2 to DA4 Channel A digital input Channel A digital input (LSB) Channel B digital input (MSB) Unused (no connection) Channel B digital input Channel B digital input (LSB) Channel C digital input (MSB) Channel C digital input Digital system power supply (+5 V) Channel C digital input Channel C digital input Channel C digital input (LSB) Clock input Unused (no connection) Digital system power supply (+5 V) Digital system ground (0 V) Channel C negative output. Connect to A.GND through an output resistor RO (usually 75 ). Channel C positive output. Connect to A.GND through an output resistor RO (usually 75 ). Analog system power supply (+5 V) Analog system power supply (+5 V) Channel B negative output. Connect to A.GND through an output resistor RO (usually 75 ). Channel B positive output. Connect to A.GND through an output resistor RO (usually 75 ). Analog system ground (0 V) Channel A negative output. Connect to A.GND through an output resistor RO (usually 75 ). Channel A positive output. Connect to A.GND through an output resistor RO (usually 75 ). Analog system power supply (+5 V) Phase compensation capacitor. Connect a 1 F capacitor between this pin and ground. Unused (no connection) Reference current output. Connect a resistor that is 4 times the output resistance RO to this pin. Reference voltage input. This input pin sets the analog output dynamic range. Reference voltage output. The output voltage is set to 0.2 times VDD by a resistor divider. When VDD is 5.0 V, a 1.0 V reference voltage can be acquired from pin 40. Digital system ground (0 V) Digital system power supply (+5 V) Digital system power supply (+5 V) Channel A digital input (MSB) Channel A digital input Description No. 4030-4/8 LC89080, 89080Q LC89080 Operation The LC89080 and LC89080Q include three current-matrix D/A converters on chip. These D/A converters each have 63 basic current cells (with current weight I) and two weighted current cells (I/2 and I/4). These current cells are turned on or off according to the input digital code (a binary code). The sum of these currents is output to the output pins (IO and IOB) and the output current is converted to a voltage by the output resistor (RO) to acquire the analog output. The table shows the ideal relationship between the digital input and the analog output when VREFIN is 1 V. Digital input code D1 MSB 0 0 0 D2 0 0 0 D3 0 0 0 D4 0 0 0 D5 0 0 0 D6 0 0 0 D7 0 0 1 D8 LSB 0 1 0 Analog output voltage IO (positive output) 0 0.004 0.008 IOB (negative output) 0.996 0.992 0.988 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0.496 0.500 0.500 0.496 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 1 0 1 0.988 0.992 0.996 0.008 0.004 0 Sample Application Circuit: LC89080 No. 4030-5/8 LC89080, 89080Q Sample Application Circuit: LC89080Q Application circuit in which the output resistance is 75 and the internally generated 1-V reference voltage is used. AC Characteristics at Ta = -30 to 70C, VDD = 4.5 to 5.5 V Parameter Data setup time Data hold time Output delay time Symbol ts th td Conditions min 15 15 10 typ max Unit ns ns ns No. 4030-6/8 LC89080, 89080Q Timing Chart The digital inputs for all 3 channels are acquired on the rising edge of the clock input, after which the corresponding analog voltages are output. No. 4030-7/8 LC89080, 89080Q Block Diagram s No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. s Anyone purchasing any products described or contained herein for an above-mentioned use shall: Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. s Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of February, 1997. Specifications and information herein are subject to change without notice. No. 4030-8/8 |
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